Introductory VHDL : from simulation to synthesis

Main Author: Yalamacnchili
Format: Open Shelf
Published: Upper Saddle River, NJ: Prentice Hall, c2001.
Series: Xilinx Design Series
Subjects:
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005 20150326090000.0
002 002231
020 |a 0130809829 
090 0 0 |a TK7885.7   |b Y354 2001 
100 0 |a Yalamacnchili  
245 0 0 |a Introductory VHDL :   |b from simulation to synthesis   |c Sudhakar Yalamanchili 
260 |a Upper Saddle River, NJ:   |b Prentice Hall,   |c c2001. 
300 |a xix,401p:   |b ill;   |c 25cm. 
490 0 |a Xilinx Design Series 
504 |a Includes bibliographical references and index 
650 0 0 |a VHDL (Computer hardware description language)  
999 0 0 |a 004192 
999 |a 0000046384