Ciletti. (1999). Modeling, synthesis, and rapid prototyping with the Verilog HDL. Upper Saddle River, N.J: Prentice Hall.
Chicago Style CitationCiletti. Modeling, Synthesis, and Rapid Prototyping With the Verilog HDL. Upper Saddle River, N.J: Prentice Hall, 1999.
MLA CitationCiletti. Modeling, Synthesis, and Rapid Prototyping With the Verilog HDL. Upper Saddle River, N.J: Prentice Hall, 1999.
Warning: These citations may not always be 100% accurate.