Modeling, synthesis, and rapid prototyping with the Verilog HDL
| Main Author: | Ciletti |
|---|---|
| Format: | Open Shelf |
| Published: |
Upper Saddle River, N.J:
Prentice Hall,
c1999.
|
| Subjects: |
KKTM PETALING JAYA
| Call Number: |
TK7885 7 C554 1999 |
|---|
| Accession | Item Category | SMD | Status | Due Date | Notes |
|---|
| 0000046382 | OPEN SHELF | BOOK | AVAILABLE |